1. Field of the Invention
The present invention relates to a priority selecting system for a multi-channel memory of a computer having a removable multi-channel memory.
2. Description of the Prior Art
Recently, as the semiconductor technology has developed, a personal or small business purpose microcomputer having a programmable processing LSI, called a microprocessor (hereinafter referred to as an MPU) has been marketed with a relatively low price. Such a computer is usually called a personal computer or a home computer in which data are processed eight bits in parallel and address information comprises sixteen bits from the standpoints of price, availability and performance. Thus, 2.sup.16 =65,536 addresses can be directly read from or written into the MPU. As the performance is graded up, most of such an address space is used up in many cases. The address space comprises a ROM area in which a program for controlling a hardware of the microcomputer and characterizing a system (hereinafter referred to as a system program) is stored in a read-only memory (hereinafter referred to as a ROM) and a RAM area in which display data are temporarily stored and a user program is stored. Peripheral devices are selected from a variety of devices and programs for controlling an external memory or a control interface, which is sold separately or developed by a user, is also to be stored depending on the peripheral devices connected.
When a system is to be expanded without a margin of the address space, a bank switching method is usually employed. In the bank switching method, a plurality of channel memories connected in parallel to a CPU and a selection circuit for selecting a desired one of the channel memories are provided so that only the channel memory having data written into the selection circuit from the CPU is accessed.
Since this method allows the use of as many channel memories as required connected in parallel, it is an effective way to overcome the shortage of the address space. However, since the channel memories must be switched by a fixed unit area, the channel memories must be switched even when memories having no overlapped address are to be accessed. In addition, in this method, a complex software process such as a step for checking whether a desired address is included in the selected channel memory or a step for determining if the memory is ROM or RAM, is required so that a necessary memory capacity increases and a processing speed is lowered. Furthermore, when an unexpected modification of the program in a masked ROM area or a modification of a controlling software due to a grade-up of pheripheral devices is required, there is no way but reconstructing the masked ROM.